Researchers in Japan have demonstrated a high-temperature transistor that functions at up to 1,110 degrees Fahrenheit, or 600 degrees Celsius. The device, a silicon carbide junction field-effect transistor, or JFET, could enable electronics to operate on the surface of Venus, where the thick carbon dioxide atmosphere reaches about 860 F, and in other extreme environments.
The study team described the design and performance of the high-temperature transistor in a paper published Aug. 17 in APL Electronic Devices. JFETs control current by varying an electric field across a conductive channel. While MOSFETs dominate consumer electronics because they are easier to scale, JFETs can deliver lower noise since they do not rely on an oxide layer that can introduce interference.
High-temperature transistor challenges
Silicon carbide JFETs have been viewed as promising for Venus-bound low-power integrated circuits since the early 2000s due to SiC’s thermal resilience. According to the researchers, past Venus landers using silicon electronics survived only hours, with the Soviet Venera 13 holding the record at 2 hours and 7 minutes.
The team noted that SiC-based integrated circuits are attractive for deep-space exploration, geothermal drilling, and aerospace engine control, where conventional silicon devices struggle to operate reliably.
However, recent SiC-JFET efforts have run into two persistent issues: poor controllability of the threshold voltage and excessive leakage currents at high temperatures. In SiC’s crystalline structure, dopant atoms can diffuse deeper than intended.
Under extreme heat, this alters the voltage needed to open the channel, shifting thresholds by more than 2 volts and complicating reliable control. In addition, above about 660 F, the SiC substrate becomes less resistive, allowing unwanted current flow even when the device is switched off, which degrades signal integrity and raises power use.
Even the best prior designs were typically limited to continuous operation around 930 F.
“We believe the lack of development is because the research community has been trying to apply silicon-era thinking to a fundamentally different material,” said first author Mitsuaki Kaneko, an associate professor of engineering at Kyoto University, in a statement.
Turning the design upside down for high-temperature transistor performance
To address controllability, the Kyoto team implemented a bottom-gate structure that places the gate beneath the SiC conducting channel. The gate region is intentionally and heavily doped, so if dopants in the channel penetrate deeper at high temperatures, the overall gate-channel profile remains stable and the threshold voltage is less affected.
The researchers also introduced two doped semiconductor wells around the JFET. The interfaces between these wells act as barriers to current flow, helping block leakage paths that emerge when SiC becomes more conductive at elevated temperatures.
This confines current to the intended channel when the device is off.
Measurements of on-off switching behavior and threshold accuracy were taken from room temperature up to 1,110 F. The fabricated devices showed stable, normal transistor operation above 873 K, or 1,110 F.
Thanks to the bottom-gate design, the threshold-voltage error at about 750 F, or 400 C, was under 0.1 volt, closely matching theoretical expectations based on thickness and doping.
Beyond Venus missions, the high-temperature transistor could benefit systems inside jet engines and gas turbines. Today, electronics near hot sections require thermal shielding, long wiring runs, and energy-intensive cooling, which constrain design and add weight and complexity.
Further development is needed before deployment. The team plans to integrate the device into more complex circuits, scale fabrication to wafer level, and ensure packaging can survive extreme temperatures and pressures.
Previous work has shown the potential: NASA reported SiC-JFET-based integrated circuits enduring 860 F and roughly 9.3 MPa of pressure for 60 days, and 930 F in air for more than a year.
Separately, in 2024, researchers at Japan’s National Institute for Materials Science demonstrated a diamond-based MOSFET operating above 570 F.
The new results are detailed in “Over 600°C operation of ion-implantation-based SiC bottom-gate JFETs,” by Mitsuaki Kaneko, Shunya Shibata, and Tsunenobu Kimoto, published in APL Electronic Devices.